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/usr/include/mips-linux-gnu/asm

Name	Size	Mode	Actions
auxvec.h	616	0644	edit dl rm
bitfield.h	766	0644	edit dl rm
bitsperlong.h	244	0644	edit dl rm
bpf_perf_event.h	40	0644	edit dl rm
break.h	1321	0644	edit dl rm
byteorder.h	580	0644	edit dl rm
cachectl.h	800	0644	edit dl rm
errno.h	5777	0644	edit dl rm
fcntl.h	2013	0644	edit dl rm
hwcap.h	700	0644	edit dl rm
inst.h	29908	0644	edit dl rm
ioctl.h	781	0644	edit dl rm
ioctls.h	4834	0644	edit dl rm
ipcbuf.h	32	0644	edit dl rm
kvm.h	7690	0644	edit dl rm
kvm_para.h	34	0644	edit dl rm
mman.h	4702	0644	edit dl rm
msgbuf.h	2327	0644	edit dl rm
param.h	476	0644	edit dl rm
perf_regs.h	864	0644	edit dl rm
poll.h	217	0644	edit dl rm
posix_types.h	757	0644	edit dl rm
ptrace.h	2734	0644	edit dl rm
reg.h	5426	0644	edit dl rm
resource.h	1067	0644	edit dl rm
sembuf.h	1079	0644	edit dl rm
setup.h	168	0644	edit dl rm
sgidefs.h	1054	0644	edit dl rm
shmbuf.h	1937	0644	edit dl rm
sigcontext.h	2549	0644	edit dl rm
siginfo.h	857	0644	edit dl rm
signal.h	3631	0644	edit dl rm
socket.h	4987	0644	edit dl rm
sockios.h	768	0644	edit dl rm
stat.h	3015	0644	edit dl rm
statfs.h	1987	0644	edit dl rm
swab.h	1460	0644	edit dl rm
sysmips.h	841	0644	edit dl rm
termbits.h	6151	0644	edit dl rm
termios.h	2130	0644	edit dl rm
types.h	881	0644	edit dl rm
ucontext.h	2198	0644	edit dl rm
unistd.h	998	0644	edit dl rm
unistd_n32.h	16564	0644	edit dl rm
unistd_n64.h	15390	0644	edit dl rm
unistd_o32.h	18382	0644	edit dl rm

Edit: /usr/lib/linux/uapi/mips/asm/kvm.h (7690B)

/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2012  MIPS Technologies, Inc.  All rights reserved.
 * Copyright (C) 2013 Cavium, Inc.
 * Authors: Sanjay Lal <sanjayl@kymasys.com>
 */

#ifndef __LINUX_KVM_MIPS_H
#define __LINUX_KVM_MIPS_H

#include <linux/types.h>

/*
 * KVM MIPS specific structures and definitions.
 *
 * Some parts derived from the x86 version of this file.
 */

#define KVM_COALESCED_MMIO_PAGE_OFFSET 1

/*
 * for KVM_GET_REGS and KVM_SET_REGS
 *
 * If Config[AT] is zero (32-bit CPU), the register contents are
 * stored in the lower 32-bits of the struct kvm_regs fields and sign
 * extended to 64-bits.
 */
struct kvm_regs {
	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
	__u64 gpr[32];
	__u64 hi;
	__u64 lo;
	__u64 pc;
};

/*
 * for KVM_GET_FPU and KVM_SET_FPU
 */
struct kvm_fpu {
};

/*
 * For MIPS, we use KVM_SET_ONE_REG and KVM_GET_ONE_REG to access various
 * registers.  The id field is broken down as follows:
 *
 *  bits[63..52] - As per linux/kvm.h
 *  bits[51..32] - Must be zero.
 *  bits[31..16] - Register set.
 *
 * Register set = 0: GP registers from kvm_regs (see definitions below).
 *
 * Register set = 1: CP0 registers.
 *  bits[15..8]  - COP0 register set.
 *
 *  COP0 register set = 0: Main CP0 registers.
 *   bits[7..3]   - Register 'rd'  index.
 *   bits[2..0]   - Register 'sel' index.
 *
 *  COP0 register set = 1: MAARs.
 *   bits[7..0]   - MAAR index.
 *
 * Register set = 2: KVM specific registers (see definitions below).
 *
 * Register set = 3: FPU / MSA registers (see definitions below).
 *
 * Other sets registers may be added in the future.  Each set would
 * have its own identifier in bits[31..16].
 */

#define KVM_REG_MIPS_GP		(KVM_REG_MIPS | 0x0000000000000000ULL)
#define KVM_REG_MIPS_CP0	(KVM_REG_MIPS | 0x0000000000010000ULL)
#define KVM_REG_MIPS_KVM	(KVM_REG_MIPS | 0x0000000000020000ULL)
#define KVM_REG_MIPS_FPU	(KVM_REG_MIPS | 0x0000000000030000ULL)

/*
 * KVM_REG_MIPS_GP - General purpose registers from kvm_regs.
 */

/*
 * KVM_REG_MIPS_CP0 - Coprocessor 0 registers.
 */

#define KVM_REG_MIPS_MAAR	(KVM_REG_MIPS_CP0 | (1 << 8))
#define KVM_REG_MIPS_CP0_MAAR(n)	(KVM_REG_MIPS_MAAR | \
					 KVM_REG_SIZE_U64 | (n))

/*
 * KVM_REG_MIPS_KVM - KVM specific control registers.
 */

/*
 * CP0_Count control
 * DC:    Set 0: Master disable CP0_Count and set COUNT_RESUME to now
 *        Set 1: Master re-enable CP0_Count with unchanged bias, handling timer
 *               interrupts since COUNT_RESUME
 *        This can be used to freeze the timer to get a consistent snapshot of
 *        the CP0_Count and timer interrupt pending state, while also resuming
 *        safely without losing time or guest timer interrupts.
 * Other: Reserved, do not change.
 */
#define KVM_REG_MIPS_COUNT_CTL	    (KVM_REG_MIPS_KVM | KVM_REG_SIZE_U64 | 0)
#define KVM_REG_MIPS_COUNT_CTL_DC	0x00000001

/*
 * CP0_Count resume monotonic nanoseconds
 * The monotonic nanosecond time of the last set of COUNT_CTL.DC (master
 * disable). Any reads and writes of Count related registers while
 * COUNT_CTL.DC=1 will appear to occur at this time. When COUNT_CTL.DC is
 * cleared again (master enable) any timer interrupts since this time will be
 * emulated.
 * Modifications to times in the future are rejected.
 */
#define KVM_REG_MIPS_COUNT_RESUME   (KVM_REG_MIPS_KVM | KVM_REG_SIZE_U64 | 1)
/*
 * CP0_Count rate in Hz
 * Specifies the rate of the CP0_Count timer in Hz. Modifications occur without
 * discontinuities in CP0_Count.
 */
#define KVM_REG_MIPS_COUNT_HZ	    (KVM_REG_MIPS_KVM | KVM_REG_SIZE_U64 | 2)

/*
 * KVM_REG_MIPS_FPU - Floating Point and MIPS SIMD Architecture (MSA) registers.
 *
 *  bits[15..8]  - Register subset (see definitions below).
 *  bits[7..5]   - Must be zero.
 *  bits[4..0]   - Register number within register subset.
 */

#define KVM_REG_MIPS_FPR	(KVM_REG_MIPS_FPU | 0x0000000000000000ULL)
#define KVM_REG_MIPS_FCR	(KVM_REG_MIPS_FPU | 0x0000000000000100ULL)
#define KVM_REG_MIPS_MSACR	(KVM_REG_MIPS_FPU | 0x0000000000000200ULL)

/*
 * KVM_REG_MIPS_FPR - Floating point / Vector registers.
 */
#define KVM_REG_MIPS_FPR_32(n)	(KVM_REG_MIPS_FPR | KVM_REG_SIZE_U32  | (n))
#define KVM_REG_MIPS_FPR_64(n)	(KVM_REG_MIPS_FPR | KVM_REG_SIZE_U64  | (n))
#define KVM_REG_MIPS_VEC_128(n)	(KVM_REG_MIPS_FPR | KVM_REG_SIZE_U128 | (n))

/*
 * KVM_REG_MIPS_FCR - Floating point control registers.
 */
#define KVM_REG_MIPS_FCR_IR	(KVM_REG_MIPS_FCR | KVM_REG_SIZE_U32 |  0)
#define KVM_REG_MIPS_FCR_CSR	(KVM_REG_MIPS_FCR | KVM_REG_SIZE_U32 | 31)

/*
 * KVM_REG_MIPS_MSACR - MIPS SIMD Architecture (MSA) control registers.
 */
#define KVM_REG_MIPS_MSA_IR	 (KVM_REG_MIPS_MSACR | KVM_REG_SIZE_U32 |  0)
#define KVM_REG_MIPS_MSA_CSR	 (KVM_REG_MIPS_MSACR | KVM_REG_SIZE_U32 |  1)

/*
 * KVM MIPS specific structures and definitions
 *
 */
struct kvm_debug_exit_arch {
	__u64 epc;
};

/* for KVM_SET_GUEST_DEBUG */
struct kvm_guest_debug_arch {
};

/* definition of registers in kvm_run */
struct kvm_sync_regs {
};

/* dummy definition */
struct kvm_sregs {
};

struct kvm_mips_interrupt {
	/* in */
	__u32 cpu;
	__u32 irq;
};

#endif /* __LINUX_KVM_MIPS_H */

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